Latest release helps to accelerate prototype development, increase engineering productivity, and achieve the maximum performance from your prototype.

SAN JOSE, Calif., Sept. 3, 2014 -- S2C, Inc. announced today the release of TAI Player Pro version 5.1. This latest release helps to accelerate prototype development, increase engineering productivity, and achieve the maximum performance from your prototype.

"The new version of TAI Player Pro enhances the power and capability of our entire line," said Toshio Nakama, CEO of S2C. "It's a powerful configuration tool - we recently had a customer partition a 300 million gate design over 24 FPGAs. In addition, TAI Player Pro is a runtime tool that can monitor and control several FPGA-based platforms across the network. I'm very pleased to provide this new level of capability to our customers."

About TAI Player Pro

TAI Player Pro is tightly integrated with S2C's family of Logic Module prototyping systems and provides two major functions. The first is to map a design across one or more FPGAs which includes partitioning, plus managing synthesis and FPGA P&R tools. TAI Player Pro automatically inserts LVDS pin-multiplexing to insure a design can be partitioned across multiple FPGAs and maintain good prototype performance.

The second function of TAI Player Pro is to monitor and control a running prototype. It provides advanced features such as global clock management, hardware self-test, remote-controlled power-up sequencing, and "Virtual Switches and LEDs", a remote I/O feature that feels like real hardware - perfect for simple tasks such as changing a setting or indicating a condition.

TAI Player Pro handles not only single board configurations (single, dual, and quad FPGAs) but multi-board configurations that can accommodate the largest of designs. Robust and battle-tested, TAI Player Pro is currently used in production by more than 200 customers.

About S2C

Founded in 2003 and headquartered in San Jose, California, S2C provides rapid SoC prototyping solutions including:

*Rapid FPGA-based prototyping hardware and automation software
*Prototype Ready™ IP, interfaces and platforms
*System-level design verification and acceleration tools

S2C's flexible, expandable and reusable hardware architecture combined with transaction-based links to system simulations make S2C's solution an ideal common platform for major design phases from algorithm exploration, IP design, system integration to compatibility testing. S2C currently has offices or representatives in the US, Europe, Japan, Korea, China, Taiwan, and India. For more information, visit www.s2cinc.com.